IDT公司的9ZXL1951D是19路输出零延迟时钟驱动器,具有用于PCIe和CPU的第二代增强性能缓冲器,满足所有发表过的QPI/UPI,DB2000Q和PCIe Gen1–5抖动指标.器件的ZDB模式相位抖动器:PCIe Gen5CC<24fsRMS(低带宽),QPI/UPI11.4GB/s<110fsRMS(低带宽),IF-UPI附加抖动<130fsRMS(低带宽);而Fanout缓冲器模式附加相抖动器:PCIeGen5CC<15fs RMS,DB2000Q附加抖动<25fs RMS,QPI/UPI11.4GB/s<40fs RMS,IF-UPI附加抖动<70fsRMS,周期到周期的抖动<50ps,输出到输出偏差<50ps.LP-HCSL输出,每个输出对可省略多达4个电阻,9个可选择SMBus地址.工作温度-40℃到+85℃.主要用在服务器,nVME存储,网络,加速度计和工业应用.本文介绍了9ZXL1951D主要指标和优势,框图,负载相位抖动测量图,以及PCIe时钟发生器评估板EVK9ZXL1951D主要特性和电路图.

The 9ZXL 15x0D/9ZXL 19x0D/9ZXL 1951D devices comprise a family of 2nd-generation enhanced performance buffers for PCIe and CPU applications.The family meets all published QPI/UPI,DB2000Q and PCIe Gen1–5 jitter specifications.Devices are either 15 or 19 outputs.The devices function as both fanout(FOB)and zero-delay(ZDB)buffers.All devices meet DB2000Q and DB1900Z jitter and skewrequirements.

9ZXL1951D主要指标:

▪ZDB Mode phase jitter:

•PCIe Gen5 CC<24fs RMS(Low Bandwidth)

•QPI/UPI 11.4GB/s<110fs RMS(Low Bandwidth)

•IF-UPI additive jitter<130f sRMS(Low Bandwidth)

▪Fanout Buffer Mode additive phase jitter:

•PCIe Gen5 CC<15fs RMS

•DB2000Q additive jitter<25fs RMS

•QPI/UPI 11.4GB/s<40fs RMS

•IF-UPI additive jitter<70fs RMS

▪Cycle-to-cycle jitter:<50ps

▪Output-to-output skew:<50ps

9ZXL1951D主要特性:

▪LP-HCSL outputs eliminate up to 4 resistors per output pair

▪9 selectable SMBus addresses

▪Selectable PLL bandwidths minimize sjitter peaking in cascaded PLL topologies

▪Hardware/SMBus control of ZDB and FOB modes allow change without powercycle

▪8 OE# pins support PCIe CLKREQ#functionality(9ZXL1951)

▪Spread spectrum compatible

▪100MHz and 133.33MHz ZDB mode(9ZXL15x0,9ZXL19x0)

▪100MHz ZDB mode(9ZXL1951)

▪1–400MHz FOBmode(alldevices)

▪-40°Cto+85°Coperating temperature range

▪Package information:see Ordering Information table

输出:

▪15 or 19 Low-power HCSL(LP-HCSL)output pairs

PCIe时钟架构:

▪Common Clocked(CC)

▪Independent Reference(IR)with and without spread spectrum

9ZXL1951D典型应用:

▪Servers

▪nVMEStorage

▪Networking

▪Accelerators

▪Industrial

图1.9ZXL1951D框图

图2.采用相位噪音分析仪测量负载相位抖动图

图3.采用示波器测量负载相位抖动图

PCIe时钟发生器评估板EVK9ZXL1951D

The evaluation board is designed to help the customer evaluate the 9ZXL1951D.The device is programmable through an SMBus interface.This user guide details the board set and connection,as well as the companion GUI installation for communicating to the device.The board has a self-contained USB to SMBus interface.

图4.评估板EVK9ZXL1951D外形图

图5.评估板EVK9ZXL1951D电路图:9ZXL1951D连接

图6.评估板EVK9ZXL1951D电路图:USB接口和电源

详情请见:http://img04.hc360.com/ec/202002/202002241331269069.rar